TPM21520

4.2-A Source, 7.8-A Sink, 5.7-kV_RMS Dual-Channel Isolated Gate Driver

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概述
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概述

The TPM21520 series consists of isolated dual-channel gate drivers that feature 4.2-A source and 7.8-A sink peak current. These drivers are specifically designed to power MOSFETs, IGBTs, and SiC MOSFETs, with ultralow propagation delay and minimal pulse-width distortion.

The input side of the TPM21520 series is isolated from its two output drivers by a reinforced isolation barrier rated at 5.7 kVRMS, providing a typical of 125-V/ns common-mode transient immunity (CMTI). Additionally, the two secondaryside drivers feature internal functional isolation, enabling a working voltage of up to 1500 V_DC.

Each driver within the series offers flexible configuration options, functioning as either two low-side drivers, two high-side drivers, or as a half-bridge driver with a programmable dead time. For safety measures, a dedicated disable pin is included. When the pin is set to high, both outputs are simultaneously shut down. Leaving this pin open or grounding, it allows for normal operation. Furthermore, the system incorporates a fail-safe mechanism that forces both outputs to go low in the event of a primary-side logic failure.

Status

Production
Rating

Industrial
Isolation Rating

Reinforced
Isolation Rating (Vrms)

5700
Number of Channels

2
Input

TTL/CMOS
Driver UVLO Threshold Typ (V)

12
Peak Output Current (A)

4.2/7.8
Features

Deadtime Control
Output Voltage Max (V)

30
Output Voltage Min (V)

13.5
Propagation Delay (ns)

30
Package

WSOP16
Junction Temperature Range (℃)

-40 to +150

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- Datasheet_TPM21520x_TPM21520xQ
  
  数据手册
  
  英文
  
  07/02/2025
  
  4.2-A Source, 7.8-A Sink, 5.7-kV_RMS Dual-Channel Isolated Gate Driver
- Introduction to Latch-up and the Preventive Measures
  
  技术文章
  
  英文
  
  01/19/2024
- Introduction to ESD Performance of a Silicon Chip
  
  技术文章
  
  英文
  
  01/19/2024
- Application Tips on ESD-EOS
  
  技术文章
  
  英文
  
  01/19/2024
- 思瑞浦模拟产品选型册
  
  选型手册
  
  中文
  
  01/19/2024